1. Field of the Invention
The present invention relates to a solid-state imaging apparatus used for a scanner, a video camera, a digital still camera, and the like, and to a method of driving the solid-state imaging apparatus.
2. Description of the Related Art
In recent years, there has been a request for increasing the number of pixels in a CMOS solid-state imaging apparatus. When the number of pixels is increased, the number of pixels to be read during one horizontal scanning period is increased, so that the reading speed of pixel signals needs to be increased. The techniques to cope with the increase in the reading speed include a method disclosed in Japanese Patent Application Laid-Open No. 2007-194720 (hereinafter referred to as Patent Document 1).
In Patent Document 1, it is described that the image reading speed can be increased by reducing the vertical transfer wait period in such a manner that pixels of a solid-state imaging apparatus are divided into first and second groups, and that while output signals from one pixel group are vertically transferred, output signals from the other pixel group are horizontally transferred.
However, the solid-state imaging apparatus, to which the above described reading method is applied, has the following problems.
As described above, the horizontal transfer and the vertical transfer are simultaneously performed in the method disclosed in Patent Document 1. In the configuration described in Patent Document 1, a noise generated in synchronization with a sampling pulse of a sampling and holding circuit in each holding unit may be superimposed on a pixel signal during the horizontal transfer, so as to deteriorate the image quality. When the current flowing through the power supply path is rapidly changed in association with the sampling operation of the pixel signal in the holding unit, the power supply voltage is changed due to the parasitic impedance, such as an inductance component of a bonding wire, and the like, on the power supply path. The above described noise is caused by the change in the power supply voltage being transmitted to the reading circuit. Therefore, the noise tends to be increased, as the holding capacitor to be simultaneously driven is increased so as to thereby increase the magnitude of transient change caused in the charge and discharge current of the holding capacitor during the sampling operation. As the number of pixels is increased to thereby increase the holding capacitor, the influence of the holding capacitor appears as a more serious problem.
As a method to suppress the noise, a method to increase the transition time (rising time and decaying time) of the sampling pulse is considered. The dulling of the sampling pulse corresponds to that the on-resistance of the switch in the sampling and holding circuit configured by a MOS transistor is reduced at low speed. By using the method, the rapid change, which is caused in the current flowing into the holding capacitor via the switch to cause the noise, can be suppressed, so that the noise can be suppressed.
However, as described in Patent Document 1, when the vertical transfer period exists in a period other than the horizontal transfer period, and when the sampling pulse is uniformly dulled by means of the above described measure, the vertical transfer period is increased, so that the blanking period is increased. When the blanking period is increased, the horizontal transfer period is reduced. Therefore, the horizontal transfer needs to be performed at higher speed, so that a higher drive speed of the reading circuit is required.